1. Field of the Invention
The present invention relates to a high-density multiple-port register sensing circuit and, more particularly, to a current-mode sensing structure of a high-density multiple-port register in embedded flash memory procedure and a method for the same.
2. Description of Related Art
Generally speaking, the design of multiple-port register predominantly adopts the single-ended voltage sensing scheme. As shown in FIG. 1, a 5-port register file cell 10 has two ports for writing, respectively having bit lines WBL1 and WBL2 and word lines WWL1 and WWL2, and three ports for reading, respectively having bit lines RDL1, RBL2 and RBL3 and word lines RWL1, RWL2 and RWL3. After the bit line RBL3 of the 5-port register file cell inputs a voltage V(bl) to a single-ended voltage-mode sensing amplifier (VSA) 12, the VSA 12 will sense the input voltage and then send it out.
The voltage sensing scheme has the drawbacks of a low speed and a too small dynamic noise margin. The sense voltage input to the voltage sensing scheme needs to be large enough. Moreover, in a high-density register, the larger the load of a bit line, the longer the sensing time, as the following equation showsT(sense)=C(bl)×V(sense)/Icell where C(bl) is the resistance of a bit line in the multiple-port register, and Icell is the current input from the multiple-port register to the voltage sensing scheme. Because the sense voltage is large, the sensing time is relatively long. Besides, because the voltage sensing scheme is single-ended, the common mode rejection ratio (CMRR) is inferior, causing a larger error.
The present invention aims to propose a current-mode sensing structure of a high-density multiple-port register in embedded flash memory procedure and a method for the same to effectively solve the above problems in the prior art.